Nektarios Kranitis received the B.Sc. in Physics from the University of Patras, Patras, Greece, in 1997 and the Ph.D. in Informatics and Telecommunications from the National and Kapodistrian University of Athens (NKUA), Athens, Greece in 2005 under Scholarship for Ph.D. studies from the Institute of Informatics and Telecommunications, National Centre for Scientific Research (N.C.S.R.) Demokritos.
As a Postdoctoral researcher, he won a Postdoctoral Research Grant (€180k) from the Hellenic Foundation for Research & Innovation (H.F.R.I) for developing onboard data systems technology.
From 2020 to 2021, he was a faculty member with the University of the Peloponnese.
In June 2021, he joined the faculty of the National and Kapodistrian University of Athens (NKUA), Athens, Greece, where he currently serves as an Associate Professor and Deputy Head in the Department of Aerospace Science and Technology.
He has been involved as PI, Co-PI and senior researcher in numerous R&D projects and space missions funded by by EU (H2020, EDF), Greek Government (GSRT), Hellenic Foundation for Research and Innovation (H.F.R.I) and ESA in onboard data systems technology (€1,5M+) developing cutting-edge technology FPGA accelerators as IP Cores for compression of monoband images (CCSDS 122), hyperspectral images (CCSDS 123) and data compression (CCSDS 121), channel coding (CCSDS 131) for near-earth (C2) and deep-space (AR4JA) applications and authenticated encryption (CCSDS 352 AES/GCM), providing state of-the-art data-rate performance.
He participated in the development and demonstration of state-of-the-art satellite data-chain technologies to advance on-board data handling and support high speed data transfer for future applications in collaboration with AIRBUS DS and DLR (Hi-SIDE, GA 776151, H2020-COMPET-3-2017 High-speed data-chain awarded with Innovation in Space Award 2022).
Currently, he participates in Phase C/D/E1 of ESA PROBA-3 space mission in the development of onboard data processing FPGA firmware of the ASPIICS Coronagraph System Payload.
He participates in Phase A/B1 for the On-Board Compression activities for ESA TRUTHS, space mission.
He participates as Onboard Data Processing Technical Manager in two CubeSat missions, ERMIS and Hellenic Space Dawn, in the framework of ESA AO/1-11498/22/UK/ND GREEK CUBESATS IN-ORBIT VALIDATION PROJECTS
He participates in the development of Lossless/lossy multispectral & hyperspectral compression IP core (ESA Contract No. 4000136723/22/NL/CRS)
Google Scholar profile
European and National Funding
- Digital Design
- Computer Architecture
- Aerospace Digital Systems Design
- Space Systems Avionics (Postgraduate course)
- On-board computers & data handling
- On-board payload data processing systems
- FPGA-based acceleration
- Dependable and reliable systems design
D. Theodoropoulos, N. Kranitis, A. Tsigkanos and A. Paschalis, "Efficient Architectures for Multigigabit CCSDS LDPC Encoders," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 5, pp. 1118-1127, May 2020.
A. Tsigkanos, N. Kranitis, D. Theodoropoulos and A. Paschalis, "High-Performance COTS FPGA SoC for Parallel Hyperspectral Image Compression With CCSDS-123.0-B-1," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 11, pp. 2397-2409, Nov. 2020.
E. Machairas, N. Kranitis, “A 13.3 Gbps 9/7M Discrete Wavelet Transform for CCSDS 122.0-B-1 Image Data Compression on a Space-Grade SRAM FPGA”, MDPI Electronics, Special Issue "Hardware Architectures for Real Time Image Processing", 2020, 9(8), 1234
A. Tsigkanos, N. Kranitis, G. Theodorou and A. Paschalis, "A 3.3 Gbps CCSDS 123.0-B-1 Multispectral & Hyperspectral Image Compression Hardware Accelerator on a Space-Grade SRAM FPGA," in IEEE Transactions on Emerging Topics in Computing, vol. 9, no. 1, pp. 90-103, 1 Jan.-March 2021.
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