George Lentaris, Ph.D.

  Contact Info
    Microlab, ECE school, NTUA,
    Zografou Campus , Athens, Greece.
    glentaris [at] phys [dot] uoa [dot] gr ,   glentaris [at] microlab [dot] ntua [dot] gr

About

Dr Lentaris holds a PhD in Computing from the National & Kapodistrian University of Athens (NKUA), Greece, as well as two MSc degrees in "Logic, Algorithms, and Computation"[‡] and in "Electronic Automation"[‡], with a BSc in Physics [‡], all awarded by NKUA. His PhD research (conducted during 2006-2011 at the Electronics lab, DST, Physics dpt) resulted in the thesis entitled "Parallel Architectures and Algorithms for Digital Signal and Image Processing", which contributes in organizing parallel memories for graphics applications and designing motion estimation architectures for video compression.
    The research interests of dr Lentaris are, mainly, in parallel algorithms and architectures for applications in digital signal and image/video processing. His work focuses on digital circuit design and it includes computer vision algorithms, feature extraction, hyperspectral image classification, convolutional neural networks and deep learning AI, H.264/AVC compression, motion estimation techniques, 1D/2D signal interpolation and filtering, OFDM synchronization and baseband processing in telecommunications, FFT implementations, parallel memories organization, as well as process variability and reliability of FPGA devices (incl. radiation testing).
    Currently, he is a research associate at Microlab, NTUA, GR, working on high performance embedded computing. More specifically, his work includes HW/SW co-design of computer vision to enhance autonomous rover and/or spacecraft navigation. He is using single-/multi-/SoC-FPGA and DSP platforms to accelerate stereo vision, visual odometry, and pose estimation of uncooperative targets for future missions of ESA. Additionally, he is working on the FPGA implementation of baseband DSP algorithms for novel 5G network technologies.


Publications

  • "Combining Arithmetic Approximation Techniques for Improved CNN Circuit Design", G. Lentaris, G. Chatzitsompanis, V. Leon, K. Pekmestzi, D. Soudris. Electronics, Circuits and Systems, IEEE Int'l Conf. on (ICECS), to be presented , Glasgow, Scotland, November 2020.
  • "Analog fiber-wireless downlink transmission of IFoF/mmWave over in-field deployed legacy PON infrastructure for 5G fronthauling", Kanta, Pagano, Ruggeri, Agus, Stratakos, Merchinelli, Vagionas, Toumasis, Kalfas, Giannoulis, Miliou, Lentaris, Apostolopoulos, Pleros, Soudris, Avramopoulos. IEEE/OSA Journal of Optical Communications and Networking, vol. 12, no. 10, pp. D57-D65 , October 2020.
  • "Fast Packet Classification using RISC-V and HyperSplit Acceleration on FPGA", A. Pnevmatikou, G. Lentaris, N. Kokkalis, D. Soudris. Circuits and Systems, IEEE I'ntl Symp. on (ISCAS), pp. 1-5 , Seville Spain, October 2020.
  • "High-Performance Vision-Based Navigation on SoC FPGA for Spacecraft Proximity Operations", G. Lentaris, I. Stratakos, I. Stamoulias, D. Soudris, M. Lourakis, X. Zabulis. IEEE Transactions on Circuits and Systems for Video Technology, vol. 30, no. 4, pp. 1188-1202 , April 2020
  • "Analysis of Performance Variation in 16nm FinFet FPGA Devices", K. Maragos, E. Taka, G. Lentaris, I. Stratakos, D. Soudris. Field-Programmable Logic and Applications (FPL), IEEE Int. conf., pp. 38-44 , Barcelona Spain, September 2019.
  • "Single- and multi-FPGA Acceleration of Dense Stereo Vision for Planetary Rovers", G. Lentaris, K. Maragos, D. Soudris, M. Lourakis, X. Zabulis. ACM Transactions on Embedded Computing Systems, vol.18, issue 2, article no. 16, pp.1-27 , April 2019
  • "in-the-field Mitigation of Process Variability for Improved FPGA Performance", K. Maragos, G. Lentaris, D. Soudris. IEEE Transactions on Computers, vol. 68, no. 7, pp. 1049-1063 , July 2019
  • "TID Evaluation System with on-Chip Electron Source and Programmable Sensing Mechanisms on FPGA", G. Lentaris, K. Maragos, D. Soudris, F. Di Capua, L. Campajola, M. Campajola, A. Costantino, G. Furano, A. Tavoularis, L. Santos. IEEE Transactions on Nuclear Science, vol. 66, no. 1, pp. 312-319 , January 2019
  • "PVT-Aware Sensing and Voltage Scaling for Energy Efficient FPGAs", K. Maragos, G. Lentaris, D. Soudris, V. F. Pavlidis. Field-Programmable Gate Arrays (FPGA), Int'l Symp. on, IEEE, poster session , California USA, February 2019.
  • "Parallel Robust Absolute Orientation on FPGA for Vision and Robotics", N. Dimou, M. Lourakis, G. Lentaris, D. Soudris, D. Reisis. Electronics, Circuits and Systems (ICECS), Int'l Conf. on, IEEE, pp.1-4 , France, December 2018.
  • "FPGA SEE Test with Ultra-High Energy Heavy Ions", Furano, Tavoularis, Santos, Ferlet-Cavrois, Boatella, Garcia Alia, Fernandez Martinez, Kastriotou, Wyrwoll, Danzeca, Tali, Gacnik, Kramberger, Juul, Maragos, Lentaris. Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Int'l Symposium on, IEEE, pp.1-4 , Chicago USA, October 2018.
  • "5G mm wave networks leveraging enhanced fiber-wireless convergence for high-density environments: the 5G-PHOS approach", Papaioannou, Kalfas, Vagionas, Maniotis, Miliou, Pleros, Neto, Chanclor, Raj-Ali, Bakopoulos, Caillaud, Debregeas, Sirbu, Eichhammer, Theodoropoulou, Lyberopoulos, Kartsakli, Vardakas, Torfs, Yin, Tsagkaris, Demestichas, Giannoulis, Avramopoulos, Lentaris, Varvarigos, Tafur Monroy, Dayan, Leiba, Dimogiannis, Kontogiannis, Magri, Tartaglia, Roeloffzen, Oldenbeuving. Broadband Multimedia Systems and Broadcasting (BMSB), Int'l Symposium on, IEEE, pp.1-6 , Spain, June 2018.
  • "Evaluation Methodology and Reconfiguration Tests on the New European NG-MEDIUM FPGA",
    K. Maragos, V. Leon, G. Lentaris, D. Soudris, D. Gonzalez, R. Domingo, A. Pastor, D. Merodio, I. Conway. Adaptive Hardware and Systems (AHS), NASA/ESA Conference on, IEEE, pp. 127-134, Edindurgh, UK, August 2018
  • "High performance embedded computing in space: Evaluation of platforms for vision-based navigation", G. Lentaris, K. Maragos, I. Stratakos, L. Papadopoulos, O. Papanikolaou, D. Soudris, M. Lourakis, X. Zabulis, D. Gonzalez-Arjona, G. Furano. Journal of Aerospace Information Systems, American Institute of Aeronautics and Astronautics (AIAA), vol. 15, no. 4, pp. 178-192. , Feb 2018
  • "A Framework Exploiting Process Variability To Improve Energy Efficiency in FPGA Applications", K. Maragos, G. Lentaris, I. Stratakos, D. Soudris. ACM Great Lakes Symposium on VLSI (GLSVLSI), Proc. of, pp. 87-92 , Chicago, USA, May 2018
  • "Carrier Phase Recovery of 64 GBd Optical 16-QAM Using Extensive Parallelization on an FPGA", Kostalampros, Maragos, Lentaris, Soudris, Spatharakis, Argyris, Avramopoulos, Dris. Circuits and Systems, IEEE I'ntl Symp. on (ISCAS), pp. 1-5 , Florence Italy, May 2018
  • "Real-Time Carrier Phase Recovery for 16-QAM Utilizing the Nonlinear Least Squares Algorithm", Kostalampros, Spatharakis, Maragos, Lentaris, Argyris, Dris, Richter, Avramopoulos, Soudris. Optical Fiber Communications Conference and Exhibition (OFC), IEEE, pp. 1-3 , California USA, March 2018
  • "Project HIPNOS: Case Study of High Performance Avionics for Active Debris Removal in Space", G. Lentaris, I. Stratakos, I. Stamoulias, K. Maragos, D. Soudris, M. Lourakis, X. Zabulis, D. Gonzalez-Arjona. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 350-355, Bochum Germany, July 2017
  • "FPGA Acceleration of Hyperspectral Image Processing for High-Speed Detection Applications", S. Vellas, G. Lentaris, K. Maragos, D. Soudris, Z. Kandylakis, K. Karantzalos. Circuits and Systems, IEEE I'ntl Symp. on (ISCAS), pp. 1-4, Baltimore USA, May 2017
  • "Application Performance Improvement By Exploiting Process Variability On FPGA Devices", K. Maragos, G. Lentaris, D. Soudris, K. Siozios, V. F. Pavlidis. Design, Automation & Test in Europe (DATE), IEEE Conf. on, pp. 452-457, Lausanne Switzerland, March 2017
  • "A flexible, high-performance FPGA implementation of a feed-forward equalizer for optical interconnects up to 112 Gb/s", K. Maragos, C. Spatharakis, G. Lentaris, P. Kontzilas, S. Dris, P. Bakopoulos, H. Avramopoulos, D. Soudris. Journal of Signal Processing Systems, Springer, vol. 88, no. 2, pp. 107-125 , November 2016
  • "Acceleration techniques and evaluation on multi-core CPU, GPU and FPGA for image processing and super-resolution", G. Georgis, G. Lentaris, D. Reisis. Journal of Real-Time Image Processing, Springer, Online First, July 2016
  • "HW/SW co-design and FPGA acceleration of visual odometry algorithms for rover navigation on Mars", G. Lentaris, I. Stamoulias, D. Soudris, M. Lourakis. IEEE Transactions on Circuits and Systems for Video Technology, vol. 26, no. 8, pp.1563-1577, Aug 2016
  • "SPARTAN/SEXTANT/COMPASS: Advancing Space Rover Vision via Reconfigurable Platforms", G. Lentaris, I. Stamoulias, D. Diamantopoulos, K. Maragos, K. Siozios, D. Soudris, M. Aviles Rodrigalvarez, M. Lourakis, X. Zabulis, I. Kostavelis, L. Nalpantidis, E. Boukas, A. Gasteratos. Applied Reconfigurable Computing, 11th International Symposium Proceedings, Springer, pp.475-486,, Germany, April 2015
  • "Reduced Complexity Super-Resolution for Low-Bitrate Video Compression", G. Georgis, G. Lentaris, D. Reisis. IEEE Transactions on Circuits and Systems for Video Technology, vol.26, no.2, pp. 332-345, February 2016.
  • "Neuronal Connectivity Assessment for Epileptic Seizure Prevention: Parallelizing the Generalized Partial Directed Coherence on Many-Core Platforms", G. Georgis, D. Reisis, P. Skordilakis, K. Tsakalis, A. B. Shafique, G. Chatzikonstantis, G. Lentaris. Embedded Computer Systems: Architectures, Modeling and Simulation, IEEE 14th International conference on pp. 359-366, , Greece, July 2014
  • "SPARTAN: Developing a Vision System for Future Autonomous Space Exploration Robots", Kostavelis, Nalpantides, Boukas, Rodrigalvarez, Stamoulias, Lentaris, Diamantopoulos, Siozios, Soudris, Gasteratos. Journal of Field Robotics, Special Issue on Space Robotics, part 2, vol. 31, no. 1, pp. 107-140, DOI: 10.1002/rob.21484, Willey, Jan/Feb 2014
  • "Single-Image Super-Resolution Using Low Complexity Adaptive Iterative Backprojection", G. Georgis, G. Lentaris, D. Reisis. Digital Signal Processing, IEEE 18th International conference on pp. 1-6, DOI 10.1109/ICDSP.2013.6622833, Greece, July 2013
  • "Low Complexity Interpolation Filters for Motion Estimation and Application to the H. 264 Encoders", G. Georgis, G. Lentaris, and D. Reisis. Design and Architectures for Digital Signal Processing (editors G. Ruiz, J. A. Michell), chapter 6, ISBN 978-953-51-0874-0, InTech, 2013
  • "FPGA-Based Path-Planning of High Mobility Rover for Future Planetary Missions",
    G. Lentaris, D. Diamantopoulos, J. Stamoulias, K. Siozios, D. Soudris, and M. A. Rodrigalvarez. Electronics Circuits and Systems, 19th IEEE International Conference on, pp. 192-195, Seville, December 2012
  • "Hardware implementation of stereo correspondence algorithm for the ExoMars mission",
    G. Lentaris, D. Diamantopoulos, K. Siozios, D. Soudris, and M. A. Rodrigalvarez. Field Programmable Logic and Applications (FPL), 22nd IEEE International Conference on, pp. 667-670, Oslo, August 2012
  • "SPARTAN project: On profiling computer vision algorithms for rover navigation",
    D. Diamantopoulos, K. Siozios, G. Lentaris, D. Soudris, and M. A. Rodrigalvarez. Adaptive Hardware and Systems (AHS), NASA/ESA Conference on, IEEE, pp. 174-181, Germany, June 2012
  • "Study of interpolation filters for motion estimation with application in H.264/AVC encoders",
    G. Georgis, G. Lentaris, and D. Reisis. Electronics Circuits and Systems, 18th IEEE International Conference on, pp. 9-12, Beirut Lebanon, December 2011
  • "Configurable baseband digital transceiver for Gbps wireless 60 GHz communications",
    D. Diamantopoulos, P. Galiatsatos, A. Karachalios, G. Lentaris, D. Reisis, and D. Soudris. Electronics Circuits and Systems, 18th IEEE International Conference on, pp. 192-195, Beirut Lebanon, December 2011
  • "Design and Comparison of FFT VLSI Architectures for SoC Telecom Applications with Different Flexibility, Speed and Complexity Trade-Offs", S. Saponara, M. Rovini, L. Fanucci, A. Karachalios, G. Lentaris and D. Reisis. Circuits Systems and Signal Processing, Springer-Birkhauser Boston, vol. 31, no. 2, pp. 627-649, June 2011
  • "Customizing a VLIW Chip Multiprocessor for Motion Estimation Algorithms",
    V. Chouliaras, G. Lentaris, D. Reisis, and D. Stevens. Architecture of Computing Systems (ARCS'11), 24th Intl Conf on, Workshop Proc, pp. 178-184, Como Italy, February 2011
  • "A Control-Theoretic Approach for Efficient Design of Filters in DAC and Digital Audio Amplifiers",
    K. Tsakalis, N. Vlassopoulos, G. Lentaris, D. Reisis. Circuits Systems and Signal Processing, Springer-Birkhauser Boston, vol. 30, no. 2, pp. 421-438, April 2011 (.pdf)
  • "A Graphics Parallel Memory Organization Exploiting Request Correlations",
    G. Lentaris, D. Reisis. IEEE Transactions on Computers, vol. 59, no. 6, pp. 762-775, June 2010 (.pdf)
  • "Programmable Motion Estimation Architecture", A. Drolapas, G. Lentaris, D. Reisis. Electronics Circuits and Systems, 16th IEEE International Conference on, pp. 323-326, December 2009 (.pdf)
  • "A Real-Time Motion Estimation FPGA Architecture", K. Babionitakis, G. Doumenis, G. Georgakarakos, G. Lentaris, K. Nakos, D. Reisis, J. Sifnaios, N. Vlassopoulos. Special Issue on Field-Programmable Technology, Journal of Real-Time Image Processing, Springer, Volume 3, Issues 1-2, pp. 3-20, January 2008
  • "A Real-Time H.264/AVC VLSI Encoder Architecture", K. Babionitakis, G. Doumenis, G. Georgakarakos, G. Lentaris, K. Nakos, D. Reisis, J. Sifnaios, N. Vlassopoulos. Journal of Real-Time Image Processing, Springer, Volume 3, Issues 1-2, pp. 43-59, November 2007
  • "An Efficient H.264 VLSI Advanced Video Encoder", K. Babionitakis, G. Lentaris, K. Nakos, D. Reisis, N. Vlassopoulos, G. Doumenis, G. Georgakarakos, J. Sifnaios. Electronics Circuits and Systems, 13th IEEE International Conference on, pp. 545-548, December 2006
  • "An approach for efficient design of digital amplifers", N. Vlassopoulos, D. Reisis, G. Lentaris, G. Tombras, E. Prosalentis, N. Ritas, K. Tsakalis. Circuits and Systems, IEEE International Symposium on, 4 pp., May 2006


Theses

  • Parallel Architectures and Algorithms for Digital Signal and Image Processing, Ph.D., 2011. (.pdf, in Greek)
  • Models of Parallel Computation and Parallel Complexity, MPLA, M.Sc., 2010. (.pdf, in English)
  • Design and Implementation of Algorithms for Motion Estimation & Compensation, EA, M.Sc., 2006.
  • Computer Architectures for Digital Signal Processing, B.Sc., 2004.

Other

Dr Lentaris has participated in European and Greek funded projects such as 5G-PHOS (5G integrated Fiber-Wireless networks with DSP implementation on FPGA, for EU H2020), QUEENS2+QUEENS1 (Evaluation of the new European FPGA Nanoxplore/NG/BRAVE, for ESA), LEOTOME+HIPNOS (High Performance Avionics Solution for Advanced and Complex GNC Systems on FPGA and VPU/DSP, for ESA), COMPASS (Code Optimization and Modification for Partitioning of Algorithms developed in SPARTAN/SEXTANT, for ESA), SEXTANT (Real-time HW/SW implementation of computer vision algorithms, for ESA), SPARTAN (HW/SW co-design of computer vision algorithms, for ESA), IST-INOS (design of a VLSI H.264/AVC encoder), GSRT-PAVET (optimization of an advanced real-time video encoder), MILIWAVE (design of a wireless tranceiver), NEWCOM++ (research for reconfigurable wireless communications), IST-HIPRO (design of DSP for audio applications).
    He has served as a regular reviewer for international conferences and scientific journals such as the IEEE Transactions on Circuits and Systems for Video Technology, IEEE Transactions on Image Processing, IET Image Processing, IEEE Transactions on Multi-Scale Computing Systems, IEEE Transactions on Emerging Topics in Computing, Elsevier Microprocessors and Microsystems, Elsevier Journal of The Franklin Institute, World Scientific Journal of Circuits Systems and Computers, EURASIP Journal on Wireless Communications and Networking, IEEE Intl. Conf. On Electronics Circuits and Systems (ICECS), IEEE Intl. Conf. On Computer Engineering and Systems (ICCES), IEEE Intl. Symp. On Circuits and Systems (ISCAS). He has also been a teaching associate and teaching assistant for university courses on informatics at NKUA, as well as an academic scholar on digital circuit design and parallel programming at UNIWA.









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last update: Oct 2020

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